Posts Tagged OSX
MCU and boards testing
We are currently testing out some additional MCUs some comes with Ethernet so the inclusion of TCPIP stack could be included in the future scope. We also have received some request from Apple/Mac OSX users and as we currently don’t have access to any Apple/Mac OSX system and without any funding we cannot proceed on this. However, information pills if we can get some substantial sponsorship/donation we will proceed on this as well as intensively continue our development.
XDUINO
A project from Thailand
Embedded news- 5 Steps To Designing An Embedded Software Architecture, Step 2 September 28, 2022In this continuation of the article series, we explore the second step to designing an embedded software architecture: identifying and tracing data assets. Designing an... The post 5 Steps To Designing An Embedded Software Architecture, Step 2 appeared first on Embedded.com.
- Programming embedded systems: Functions and the Stack September 26, 2022Have you seen your stack lately? I mean, have you really looked at the stack memory and observed what exactly happens when a function is... The post Programming embedded systems: Functions and the Stack appeared first on Embedded.com.
- How to quickly evaluate data converters September 22, 2022This article explains how to record a macro and how to use it within Python and MATLAB environments to automate certain evaluation tasks without having... The post How to quickly evaluate data converters appeared first on Embedded.com.
- Struggles and suggestions with master/slave terminology September 22, 2022Removing the use of Master/Slave terminology across the industry is doable, but I suspect it will take a long time and generate a lot of... The post Struggles and suggestions with master/slave terminology appeared first on Embedded.com.
- Latest HyperRAM iteration targets high-bandwidth, low-pin-count designs September 21, 2022With HyperRAM 3.0, Infineon is aiming the high-bandwidth, low-pin–count pSRAM-based volatile memory at applications requiring expansion RAM memory. Nothing says enduring like a technology that’s... The post Latest HyperRAM iteration targets high-bandwidth, low-pin-count designs appeared first on Embedded.com.
- Implementing functionally safe RTD systems: RTD design September 19, 2022This first article in a two-part series on implementing functionally safe RTD systems discusses resistance temperature detector (RTD) circuit design and safety certification considerations. In... The post Implementing functionally safe RTD systems: RTD design appeared first on Embedded.com.
- Designing a power-saving solenoid driver: Design concepts September 19, 2022The most common approach to drive a solenoid is to apply the required voltage in the solenoid coil but using a current regulated driver to... The post Designing a power-saving solenoid driver: Design concepts appeared first on Embedded.com.
- Technical challenges curb expectations for 5G September 19, 2022When reading about 5G, it can appear to be the cure to all of our problems. But the technology may not live up to the... The post Technical challenges curb expectations for 5G appeared first on Embedded.com.
- Cadence hails EDA 2.0 with unified data and AI driven verification September 18, 2022New platform enables engineers to obtain ‘actionable intelligence’ from massive volumes of chip design and verification data, opening the door to a generation of AI-driven design and verification tools to improve productivity. The post Cadence hails EDA 2.0 with unified data and AI driven verification appeared first on Embedded.com.
- 5 Steps To Designing An Embedded Software Architecture, Step 1 September 16, 2022Some think that a clean software architecture can just emerge from coding efforts but that’s like believing that pouring a package of spaghetti into boiling... The post 5 Steps To Designing An Embedded Software Architecture, Step 1 appeared first on Embedded.com.
- 5 Steps To Designing An Embedded Software Architecture, Step 2 September 28, 2022